Field of the Invention
This invention relates generally to the field of computer processors. More particularly, the invention relates to an apparatus and method for cache occupancy determination and instruction scheduling.
Description of the Related Art
Data cache misses result in inefficient execution of program code because if the data needed to execute an operation is not stored in a cache, then a considerable amount of time (e.g., microprocessor cycles) must be expended to retrieve the data from memory. One previous solution to this problem is data prefetching where explicit architectural support is provided to anticipate the data which will be needed and to prefetch that data to the cache. Another solution is to use cache-oblivious and cache-aware algorithms that determine how to optimize the layout of data structures in memory, without the use of any special architectural support or interaction.